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Frequency Counter: Counter Schematic

Download Counter schematic circuit schematic:
PNG image (1045x714 as seen below): counter.png (21kb)
High-quality PDF: counter.pdf (258kb)
Permission to copy and use this schematic is hereby granted provided credit is given where it is due.

Counter schematic circuit schematic [21kb]

The counter makes use of 5 cascaded CD40110 which combine a decade counter, a display latch and a 7 segment LED driver in a single chip. (The decimal points are driven by IC8x.) The counter allows up and down counting (although only up counting is used in the frequency counter) and counts on the rising edge. An over- and underflow indicator is provided via CD4044 which is fed back to the logic board to allow automatic adaption of the divider or gate time if the counter has an overflow.

In normal (e.g. frequency or time measurement) operation, CD40110 is used to count the input signals "in background" while still displaying the old content. Then, when the measurement is done, the logic board provides a LOW pulse on the latch input of CNT-CTRL to put the counter content into the display latches and hence display it on the LEDs, then reset the counter (and overflow indicator) using a HIGH pulse to the reset line. The toggle line can be used to enable the up/down clock but is not used in the frequency counter.

The circuit on the left bottom is thought to provide a constant voltage sink for the LEDs. Better invent something similar since this circuit does not really work as expected and may tend to swing.


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