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Electronics -- USB Live Oscilloscope: Clock Generator

Clock Generator Circuit

Download USB-Live-Osci: Clock generator circuit schematic:
PNG image (704x504 as seen below): clockgen.png (11kb)
High-quality PDF: clockgen.pdf (73kb)
Permission to copy and use this schematic is hereby granted provided credit is given where it is due.

USB-Live-Osci: Clock generator circuit schematic [11kb]

Description

I was in a hurry when doing the clock generator and was not able to quickly come up with a simple design which would produce the varying sampling clock write strobe pulses. So, I settled with this semi-optimal but working design applying an ATtiny2313 microcontroller from Atmel.

For a 10MHz sampling clock, I need a 20MHz clock for the ATtiny2313 and hence it needs to be powered at 5V instead of 3.3V like all the other logic around. So, I had to add these HCT04 inverters for logic level translation of input pins; output pins are no big deal since both the VHC00 on the main board and the CY7C68013A on the USB-FX2 board have 5V tolerant inputs.

The CKGEN_SPI 6-pin connector is the standard SPI in-system-programming connector so that the microcontroller can be programmed by my USB-AtmelPrg programmer.

JP1 is the connection to the mainboard. The 8051 controller on the USB-FX2 board can program the sampling clock by taking INT1 HIGH, then transferring a command via the serial lines SCK and RxD while reading back status via TxD (also synchronized by SCK) and then taking INT1 LOW again.

The clock generator outputs a constant 10MHz sampling clock on the clock0 output pin. This clock will drive the AD converter and latches at constant 10MHz at any time. Since this is also the interface clock for the USB-FX2 (USB_IFCLK), we may never change the frequency and even may never have any glitch or missing pulse. (Yes, I debugged the circuit for a whole day until discovering that a tiny glitch in the USB_IFCLK introduced by the ATtiny2313 firmware while synchronizing the interface clock with the write strobes, made the FX2 stop sending data over the USB link!)

Different sampling rates are accomplished by different write strobes on the clock1 pin (USB_RDY1 which is SLWR in slave fifo mode) thereby only committing certain samples to the FIFO and hence to the USB link. So, for full 10MS/s, clock1 is simply pulled LOW, committing all samples, for 5MS/s, it is LOW at every second low-to-high transition of the sampling clock, for 1MS/s it's the same for evey 10th low-to-high transition, etc.

Clock Generator Firmware

Since it applies a microcontroller, the clock generator needs some firmware wich has to be downloaded onto its flash storage before plugging it into the mainboard.

Writing this firmware was not as simple as it may seem since the timings have to be exactly right and the sampling clock (provided by an on-chip timer/counter) must be kept in sync with the write strobes.

Supported sampling rates: 10MS/s, 5MS/s, 2.5MS/s, 1MS/s, 500kS/s, 250kS/s, 100kS/s, 50kS/s, 0S/s
The firmware was verified to have correct synchronisation for all these sampling rates.

Download: The clock generator firmware (source code and binary) is bundeled with the USB-Live-Osci software.


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